Platform index / Video presentation switcher

Analog Way LivePremier / Aquilon

A COM Express Xeon-D module driving a card frame of Intel Arria 10 GX FPGAs, one microcontroller per card. The RS models are fixed card lists; the C models are the same chassis sold configurable.

PartialIntroduced 2018LivePremier (Aquilon RS / C)Arria 10 GXCOM Express Xeon-DATSAM per cardST2110 / NDI / SDVoECustom chassisAWJ on 10606Undocumented WebSocket

The load-bearing finding. The firmware's own generated enumeration comments do the classification for you: NLC_RS4 is "NLC RS4 chassis 5U" and NLC_CPLUS is "NLC Custom chassis 5U". Same frame, same software, different cards.

Verdict. Hardware, and the manufacturer says so in its own source comments. RS models are factory-fixed card lists; C, C+, Cmax and Cmini are the same chassis in configurable form. One firmware package covers the family, cards are discovered and their FPGA designs matched at boot, and the machine is whatever is plugged into it. The architecture is a clean three-layer split: a COM Express Xeon-D module for the application and web interface, an ATSAM per card for local control, and Arria 10 GX fabric doing all the video behind a lane-based crosspoint. Its most useful property for anyone studying it is accidental — the web bundle was shipped with comments, and those comments document 387 internal enumerations of a machine whose firmware is otherwise sealed. A physical Aquilon C has since confirmed the useful half of that from the outside: the control protocol will not enumerate its own object model, the front end that ships with the device gives it up in full, and every write is broadcast to every client watching.

Method

Two bases, deliberately kept apart. The architecture findings are static: the vendor update package is AES-encrypted and was not decrypted, and what is known comes from the vendor's simulator, which bundles eleven complete device software trees whose web interface shipped unminified with its source comments intact, including a generated file documenting 387 internal enumerations. Since 2026-08-20 there is a second basis: a physical Aquilon C on our LAN, read over the documented AWJ control protocol and over the undocumented WebSocket its own front end uses, and later driven through a full write chain with every touched value restored. Rows labelled measured came off that unit. Every claim about the card silicon, the update package and the other ten firmware trees is still file-only.

Artifacts examined

  • AQL_Updater_6_2_73.awp, 751 MB — encrypted; statistics only
  • AW LivePremier Simulator.app — eleven firmware trees from 3.0.255 to 6.1.59, each carrying the device application and the web bundle the device itself serves
  • dist/client/app.*.js — the unminified web bundle; variables-webapp.enum.json revision 69.0.0-dev.0, generated from C:\Projets\NLC\wa-nlc-data-objects\resources
  • AW_APP_SIMULATOR — the 21 MB Qt/Node device binary, for the enum value strings the web bundle does not carry
  • The AWJ Protocol Programmer's Guide v4.0 — Analog Way's own published control documentation, which is why the protocol rows below are partly public rather than recovered
  • app..js, served by the device itself — roughly 22 MB of unminified webpack output, 8,105 concatenated modules that keep their original TypeScript paths and __Generated__ headers. Around 2,040 device-object module paths, each carrying an attribute table with the type, minimum, maximum, default, read-only flag and enum of every property
  • Read-only AWJ captures from the Aquilon C — the running and the staged VPU mixer maps, and the shape (not the contents) of every top-level store collection

No manufacturer firmware, binaries or documentation are redistributed here. Artifacts are referenced by name and version only. See the method and legal statement for the basis on which this analysis was performed and the boundaries it observes.

Hardware architecture

ItemFindingConfidence
HostA COM Express module. ENUM_DEVICE_CXP_MODULE is CONGATEC / ADLINK / ADVANTECH_5992 / ADVANTECH_5993 / KONTRON, and ENUM_CXP_CPU is INTEL_XEON_15XX (Broadwell) or INTEL_XEON_17XX (Ice Lake). Two disks, primary for system and secondary for dataVerified
FPGAsIntel Arria 10 GX, named in the design enumeration as A10GX with a _66 suffix for the larger die — the 10AX066 / GX 660K part. One design per card functionVerified
FPGA design catalogue44 designs, named after Game of Thrones houses by role. Input designs are Lannisters (JAIME HDMI, TYRION DP, CERSEI SDI, TYWIN optic, JEOFFREY Aptovision, TOMMEN HDMI×8, JOANNA ST2110); output designs are Starks (EDDARD HDMI, BENJEN DP, CATELYN SDI, RICKARD IP-SDI, BRANDON DP×8, ARYA Share, LYSA ST2110); processing is Wildling (TORMUND 2D, MANCE 3D); monitoring is Baratheon; backplane is MartellVerified
Card slotsMOC multiviewer, IN_1..IN_4 at 8 inputs each, PROC_1..PROC_4, OUT_1..OUT_6, FRAME_1..FRAME_2 image store, FDP backplane, FAV front panel, AUDIO, SUPPLYVerified
Distributed controlAn ATSAM microcontroller on every card, with the generator's comments giving the exact mapping — IN_n covers inputs 1–8, 9–16, 17–24, 25–32; PROC_n_A and PROC_n_B cover four scalers each; OUT_n covers four outputs eachVerified
Chassis3U, 4U, 5U or 6U. The backplane FPGA design differs between them — OBERYN and DORAN for 4U/5U, OBARA and DOREA for 6U — so the frames are not merely tallerVerified
Card mezzaninesFront-end and back-end cards carry a mezzanine: FE_MZ_DP ("8xDP IN TOP"), FE_MZ_HDMI, FE_MZ_SDI, FE_MZ_TEST. Card types themselves span DP, HDMI, SDI, SFP, optical HDMI, EXT CXP, EXT QSFP, SDVoE, capture, IP-SDI and ST2110Verified
SDVoEThe SDVoE card designs are named "Aptovision" — JEOFFREY in and ROBB out — which is the BlueRiver siliconVerified
PowerUp to three PSUs, BEL or ARTESYNVerified

Software architecture

ItemFindingConfidence
Platform nameInternally NLC — "New LiveCore". The web application's own manifest calls itself nlc-platform; the marketing name is Aquilon and the enum prefix in the user interface is AQLVerified
Detected modelsNLC_CMINI (AQL Cmini, 3U custom), NLC_RS1 and NLC_RS2 (4U), NLC_C (4U custom), NLC_RSALPHA (4U), NLC_RS3 and NLC_RS4 (5U), NLC_CPLUS (5U custom), NLC_RS5 and NLC_RS6 (6U), NLC_CMAX (6U custom), plus a debug entryVerified
Undocumented variantsVDW_W, VDW_WPLUS and VDW_WMAX — custom 4U, 5U and 6U chassis with no product page and no chassis artwork, for which the client falls back to the RS4 image. A separate ENUM_PROCESSING_MODE offers USE_DEV / FORCE_NLC / **FORCE_VDW**, so there is a second processing personality in the same firmwareVerified
Signal flow ceiling (6.1)64 logical inputs, 64 scalers (PROC_n_SCALER_mA / mB), 64 mixer pipes as main and preview pairs, 24 screens, 96 auxiliaries, 128 layers per screen, 24 outputs, 2 multiviewer outputs, 32 share streamsVerified
Crosspoint is lane-basedENUM_CROSS_PROC_IN addresses each physical input as 1 to 8 lanes (LIVE_INPUT_n_TX_0..7) according to its bandwidth, padded with entries the generator labels "Dummy input for modulo 32". A 4K source occupies several lanes of the same fabric an HD source uses one ofVerified
Processing featuresKeyer with luma and chroma plus LUT, masks, borders, LUT3D conversion and correction banks, HDR with PQ and HLG and a BBC OETF conversion path, selectable 0–3 frame buffer, output rotation, soft-edge with ten control points, 3D stereo frame mappingVerified
TransportST2110 with PTP and an NMOS registry, NDI with its own codec and error enumerations, SDVoE, Dante on the audio card, a QSFP "Share" ring for multi-frame source sharing, genlock, GPI/GPO and tally with protocol, colour and trigger modelsVerified
Web interfaceReact, served by a Node server on the device. The eleven bundled trees span 3.0.255 (2022) to 6.1.59 (2026), which makes the platform's own evolution readable side by sideVerified
AWJ, the documented pathTCP 10606, plain sockets, at most five concurrent clients, one JSON object per message terminated by ASCII 0x04. op is only ever get or replace — writing a property is the command, and there is no verb for anything else. Analog Way publish all of thisPublic
The published guide is already wrong for this firmwareOn 6.2 the screen-group path is gone, replaced by a screen-and-aux-group path, and the guide's own subscription example fails as printed. Paths move between firmware releases, so a path table is only true for the firmware it was read on — everything here is tagged 6.2.73 for that reasonMeasured
AWJ is leaf-read-onlyA get on any container answers {"value":{}}. The object model cannot be enumerated over the protocol at all: you can read a leaf whose path you already know, and nothing else. Container reads being empty also means there is no way to tell a configured screen from an unconfigured one this way. This single constraint is what the whole recovery works aroundMeasured
The front end supplies the model the protocol withholdsEvery LivePremier serves its Web RCS front end on port 80, and that bundle ships unminified — so its ~2,040 attribute tables are the device object model, with type, range, default, read-only flag and enum per property. Reading the bundle is what makes the leaves addressable, and it is the reason this platform is the most self-documenting machine in the indexVerified
The Web RCS WebSocketUndocumented, and the transport the vendor's own browser client uses: one socket (wss: when the page is https), everything wrapped as {channel, data} JSON. Three channels — LOG, DEVICE and REMOTE, with INIT and PATCH under REMOTE. DEVICE data is {path: [...], value} in both directions, because the client emits diffs of its own store in the same shape it receives them. The keep-alive is the literal three-character strings 0x9 and 0xA, which are easy to misread as control bytesVerified
State arrives over HTTP; only changes arrive over the socketThe client hydrates the entire device store with a single GET /api/stores/deviceover 100 MB on a real device — and the socket then carries only diffs. Nothing has to reconstruct state from a stream, which is precisely what makes a third-party panel over this protocol possibleMeasured
Writes are broadcast to every clientA second observer socket sees another client's changes: this is a shared bus, not a request/response channel with an echo. One toggle in the vendor UI emitted 96 frames, one per auxiliary, and toggling it back emitted the inverseMeasured
The device is never quietA timer value arrives every second on a completely idle machine, which is why the client's three-second keep-alive is never seen in practice, and why anything that redraws per frame has to coalesceMeasured
Echo semanticsA write is acknowledged by the device pushing the same path back carrying the value you wrote — a boolean for a trigger, a string for a label, an array for each master-store filter — and it then pushes triggers back to false, which acknowledges nothing at allMeasured
An empty memory is answered with silenceRecalling a populated slot echoes the request and then reports loading and the new preset id. Recalling an empty one echoes the request and says nothing further, ever — not refused, not reported. The tell is that the loading flag never appears, so anything reporting success from the echo alone is lying. Reproduced identically on the simulator and on the AquilonMeasured
Preview and programme are not buffersControl paths use PREVIEW and PROGRAM; status reports A, B and C. The device keeps three fixed buffers and the names float across them as takes swap which is which — on one recall pass on the Aquilon, screen 1 landed on A while screens 2, 3 and 4 landed on B at the same moment. There is no "preview is B" to hard-code anywhere; resolving a buffer needs the current take state. Structurally the same model as the LiveCore generation's three preset contextsMeasured
The VPU mixer modelA VPU mixer is the physical mixing and scaling resource the device allocates to a (screen, layer) pair: four processors of sixteen, 64 in a full chassis, and most chassis are part-populated — ours reports 32 fitted and 28 enabled, each tagged with its capability, its screen, its layer and its slice. A layer too wide for one mixer is split across several, one slice each, which is why an eight-slice native layer can consume an entire processor board and why counting layers never tells you whether a configuration will fit. The device reports the map read-only and keeps two copies of it, running and stagedMeasured
Pipes are not linksEach mixer reports which output pipe it is wired to and which of the screen's output links that pipe carries, and the two disagree on purpose: pipes are interleaved — a six-output screen's first mixer sits on pipes 1, 3, 5 and 7 — while the screen's own links are contiguous. Reading the pipe number as a link number draws a chassis map that is plausible and wrongMeasured

Update path & security model

ItemFindingConfidence
Update packageAES-encrypted, same construction as the LiveCore packages — 7.9998 bits/byte from byte zero, length an exact multiple of 16, no repeated 16-byte blocks in 64 MBVerified
Package scope751 MB, which is consistent with carrying every FPGA design for every card type plus an x86 system image for the COM Express module. Not confirmed — the package was not openedInferred
CertificatesThe simulator ships device-livePremier-chain-cert.pem, so the platform has a device certificate chain. Its use was not investigatedVerified
Card and design validationThe firmware carries CheckFpgaDesign, CheckHardwareSlot and a MISMATCH design state meaning "FPGA design mismatch card type", so cards are identified and their designs matched at boot. Whether that check is cryptographic or a plain identifier comparison is not knownUnknown
The front end, and the object model, are served unauthenticatedEvery LivePremier serves its Web RCS on port 80 with no authentication — and because the bundle it serves is unminified, what is served to anyone who can reach the box is the device's own object model: some 2,040 paths with their types, ranges and read-only flags. The control protocol behind it has no authentication step either. Five concurrent clients, any of which may replace. This is a control-VLAN device by constructionMeasured
Read-only is a property of the model, not a modeThe attribute tables mark properties read-only individually and the device enforces it — everything the VPU work touches is read-only in the device's own model, which is what made a read-only pass over a live machine a safe thing to do. There is no session-level read-only mode to ask for, so a client's own discipline is the only boundary between reading a machine and changing itMeasured

These rows describe how a platform validates a firmware image, because that is a structural fact about its architecture. They are not a vulnerability disclosure and no exploit, bypass or circumvention technique is published here. Licensing and entitlement mechanisms are out of scope throughout — seescope boundaries.

What is programmable

  1. 1The AWJ control API

    The whole device model is a JSON tree over a documented interface, and the web client that drives it ships unminified with the generator's comments intact — which is the only reason the model is reachable at all, since AWJ itself will not enumerate a container. This is the most thoroughly self-documenting machine in the index, everything useful about it is reachable without touching the encrypted package, and both halves have now been exercised on a real Aquilon C.

  2. 2Standards-based transport

    ST2110, NMOS, NDI, SDVoE and Dante are all first-class. Anything that wants to get pictures or audio in or out of this platform should do it through one of those rather than through the vendor's own plumbing.

  3. 3Nothing inside the frame

    Arria 10 designs delivered inside an encrypted package, matched to card identifiers at boot, with an ATSAM gatekeeping each card. There is no third-party route into the video path and no reason to look for one.

Traps

Mistakes this analysis actually made, or came close to making. They are recorded because each one produces a plausible-looking wrong answer rather than an obvious failure.

  • Going after the encrypted 751 MB package first. It is the obvious artifact and it yields four statistics; the simulator sitting in /Applications carries eleven complete firmware trees and a web bundle that was never minified. Check what the vendor already gave you before attacking what they locked.
  • Taking AQL and NLC for different products. They are the same platform — NLC is the internal name and appears in the code, the build paths and the web app manifest, while AQL appears only in user-facing labels. Searching for one and not the other halves what you find.
  • Assuming the enum names and the enum value strings live together. The binary holds the names ENUM_CHASSIS_TYPE, ENUM_CARD_FEBE_MEZZA_TYPE and so on in one table and their values in another, hundreds of kilobytes apart. Grepping for the name and finding nothing useful around it suggests the values are absent when they are simply elsewhere.
  • Reading the 64-entry scaler enumeration as sixty-four independent layer engines. They are four processing cards × eight mixers × an A/B pair, and the pairing is what makes a main-and-preview transition possible. The flat list hides the structure that matters.
  • Grepping the front-end bundle. BSD grep fails silently on its multi-megabyte lines — no match, no error, no indication anything went wrong. Everything that reads that bundle has to do it in a language that does not care how long a line is.
  • Reading a limit off the error oracle. It answers for the model rather than the chassis and contradicts the device's own declared dimensions; two of the four memory banks were nearly recorded at the wrong size this way.
  • Matching a write's acknowledgement on true instead of on the value written. Triggers are boolean, labels are strings and every master-store filter is an array, so a client that only accepts true reports labels and filters as unconfirmed forever while they land perfectly. It cost a real bug, and only hardware showed it.
  • Waiting for a keep-alive frame to identify the client's socket. It only pings after three seconds of silence and a live device never goes quiet, so a hook installed late waits forever. Adopt on the first frame instead.

Open questions

  • What VDW_* is. Three chassis variants with a dedicated FORCE_VDW processing mode, no product page and no artwork. Video-wall is the obvious guess from the initials and it is only a guess.
  • Whether the boot-time card and design check is cryptographic. CheckFpgaDesign and the MISMATCH state prove a check exists; nothing in the files says what it compares.
  • The Arria 10 part per card role. _66 clearly marks the 660K die on the output designs, which implies the unsuffixed designs target something smaller, but the specific parts are not named anywhere.
  • How much of the simulator's behaviour is the real firmware. It is a build of the device application, not a reimplementation, but it has been compiled for macOS and the boundary between simulated and real was not mapped.
  • The .awp key, which is on the device side and was not pursued.
  • What the mixer model does outside the two configurations we read. Link setups (devices 2–4), capacities other than 4K and 5K, combined VPUs, Optimized mode and Cut & Fill are all unexercised — and the second configuration we did read corrected two things the first had made look settled, which is the reason to distrust a one-chassis model.
  • Whether the path-existence oracle can be trusted for anything beyond existence. An unknown path answers with an error code, which gives a free existence check — but it reports the model's maximum rather than what the chassis has configured, and it disagrees with the front end's own declared dimensions. Useful for diffing firmware path tables, useless for limits.

Status of this entry. Substantial findings recorded, but whole subsystems remain unexamined. Rows labelled Measured were read off a running unit; everything else on this page is derived from files and has not been checked against hardware.

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